Include
stdbool.h |
sys/attribs.h |
xc.h |
Configuration
AO_IR_U1E_*
#define AO_IR_U1E_ATTRIBUTE __ISR(_UART1_FAULT_VECTOR, IPL4SRS)
The interrupt handler attribute.
#define AO_IR_U1E_PRIO (4)
#define AO_IR_U1E_SUBPRIO (0)
The interrupt priority and subpriority.
AO_IR_U1RX_*
#define AO_IR_U1RX_ATTRIBUTE __ISR(_UART1_RX_VECTOR, IPL4SRS)
The interrupt handler attribute.
#define AO_IR_U1RX_PRIO (4)
#define AO_IR_U1RX_SUBPRIO (0)
The interrupt priority and subpriority.
AO_IR_U1TX_*
#define AO_IR_U1TX_ATTRIBUTE __ISR(_UART1_TX_VECTOR, IPL4SRS)
The interrupt handler attribute.
#define AO_IR_U1TX_PRIO (4)
#define AO_IR_U1TX_SUBPRIO (0)
The interrupt priority and subpriority.
AO_IR_U2E_*
#define AO_IR_U2E_ATTRIBUTE __ISR(_UART2_FAULT_VECTOR, IPL4SRS)
The interrupt handler attribute.
#define AO_IR_U2E_PRIO (4)
#define AO_IR_U2E_SUBPRIO (0)
The interrupt priority and subpriority.
AO_IR_U2RX_*
#define AO_IR_U2RX_ATTRIBUTE __ISR(_UART2_RX_VECTOR, IPL4SRS)
The interrupt handler attribute.
#define AO_IR_U2RX_PRIO (4)
#define AO_IR_U2RX_SUBPRIO (0)
The interrupt priority and subpriority.
AO_IR_U2TX_*
#define AO_IR_U2TX_ATTRIBUTE __ISR(_UART2_TX_VECTOR, IPL4SRS)
The interrupt handler attribute.
#define AO_IR_U2TX_PRIO (4)
#define AO_IR_U2TX_SUBPRIO (0)
The interrupt priority and subpriority.
Functions
ao_ir_u1e_*
#define ao_ir_u1e_enable() { IEC1SET = _IEC1_U1EIE_MASK; }
#define ao_ir_u1e_disable() { IEC1CLR = _IEC1_U1EIE_MASK; }
Enables or disables the interrupt.
#define ao_ir_u1e_request() { IFS1SET = _IFS1_U1EIF_MASK; }
#define ao_ir_u1e_reply() { IFS1CLR = _IFS1_U1EIF_MASK; }
Requests the interrupt or replies thereto.
#define ao_ir_u1e_is_enabled() \
( \
(IEC1 & _IEC1_U1EIE_MASK) \
? true \
: false \
)
Checks whether the interrupt is enabled.
#define ao_ir_u1e_is_pending() \
( \
(IFS1 & _IFS1_U1EIF_MASK) \
? true \
: false \
)
Checks whether the interrupt is pending.
ao_ir_u1rx_*
#define ao_ir_u1rx_enable() { IEC1SET = _IEC1_U1RXIE_MASK; }
#define ao_ir_u1rx_disable() { IEC1CLR = _IEC1_U1RXIE_MASK; }
Enables or disables the interrupt.
#define ao_ir_u1rx_request() { IFS1SET = _IFS1_U1RXIF_MASK; }
#define ao_ir_u1rx_reply() { IFS1CLR = _IFS1_U1RXIF_MASK; }
Requests the interrupt or replies thereto.
#define ao_ir_u1rx_is_enabled() \
( \
(IEC1 & _IEC1_U1RXIE_MASK) \
? true \
: false \
)
Checks whether the interrupt is enabled.
#define ao_ir_u1rx_is_pending() \
( \
(IFS1 & _IFS1_U1RXIF_MASK) \
? true \
: false \
)
Checks whether the interrupt is pending.
ao_ir_u1tx_*
#define ao_ir_u1tx_enable() { IEC1SET = _IEC1_U1TXIE_MASK; }
#define ao_ir_u1tx_disable() { IEC1CLR = _IEC1_U1TXIE_MASK; }
Enables or disables the interrupt.
#define ao_ir_u1tx_request() { IFS1SET = _IFS1_U1TXIF_MASK; }
#define ao_ir_u1tx_reply() { IFS1CLR = _IFS1_U1TXIF_MASK; }
Requests the interrupt or replies thereto.
#define ao_ir_u1tx_is_enabled() \
( \
(IEC1 & _IEC1_U1TXIE_MASK) \
? true \
: false \
)
Checks whether the interrupt is enabled.
#define ao_ir_u1tx_is_pending() \
( \
(IFS1 & _IFS1_U1TXIF_MASK) \
? true \
: false \
)
Checks whether the interrupt is pending.
ao_ir_u2e_*
#define ao_ir_u2e_enable() { IEC1SET = _IEC1_U2EIE_MASK; }
#define ao_ir_u2e_disable() { IEC1CLR = _IEC1_U2EIE_MASK; }
Enables or disables the interrupt.
#define ao_ir_u2e_request() { IFS1SET = _IFS1_U2EIF_MASK; }
#define ao_ir_u2e_reply() { IFS1CLR = _IFS1_U2EIF_MASK; }
Requests the interrupt or replies thereto.
#define ao_ir_u2e_is_enabled() \
( \
(IEC1 & _IEC1_U2EIE_MASK) \
? true \
: false \
)
Checks whether the interrupt is enabled.
#define ao_ir_u2e_is_pending() \
( \
(IFS1 & _IFS1_U2EIF_MASK) \
? true \
: false \
)
Checks whether the interrupt is pending.
ao_ir_u2rx_*
#define ao_ir_u2rx_enable() { IEC1SET = _IEC1_U2RXIE_MASK; }
#define ao_ir_u2rx_disable() { IEC1CLR = _IEC1_U2RXIE_MASK; }
Enables or disables the interrupt.
#define ao_ir_u2rx_request() { IFS1SET = _IFS1_U2RXIF_MASK; }
#define ao_ir_u2rx_reply() { IFS1CLR = _IFS1_U2RXIF_MASK; }
Requests the interrupt or replies thereto.
#define ao_ir_u2rx_is_enabled() \
( \
(IEC1 & _IEC1_U2RXIE_MASK) \
? true \
: false \
)
Checks whether the interrupt is enabled.
#define ao_ir_u2rx_is_pending() \
( \
(IFS1 & _IFS1_U2RXIF_MASK) \
? true \
: false \
)
Checks whether the interrupt is pending.
ao_ir_u2tx_*
#define ao_ir_u2tx_enable() { IEC1SET = _IEC1_U2TXIE_MASK; }
#define ao_ir_u2tx_disable() { IEC1CLR = _IEC1_U2TXIE_MASK; }
Enables or disables the interrupt.
#define ao_ir_u2tx_request() { IFS1SET = _IFS1_U2TXIF_MASK; }
#define ao_ir_u2tx_reply() { IFS1CLR = _IFS1_U2TXIF_MASK; }
Requests the interrupt or replies thereto.
#define ao_ir_u2tx_is_enabled() \
( \
(IEC1 & _IEC1_U2TXIE_MASK) \
? true \
: false \
)
Checks whether the interrupt is enabled.
#define ao_ir_u2tx_is_pending() \
( \
(IFS1 & _IFS1_U2TXIF_MASK) \
? true \
: false \
)
Checks whether the interrupt is pending.